FPGA SoC software design flow and associated tools

Software development for an FPGA-based SoC is almost parallel in the SoC’s system design to the FPGA SoC’s hardware platform design. Once the SoC hardware has been fully captured and verified within Vivado, the software development environment can be handed over. This is another advantage of using an FPGA-based SoC compared to an ASIC where you need to either have an emulation version (and usually a costly one) that targets an FPGA-based prototyping platform or have built a system model for virtual prototyping.

There are handover files that the Vivado IDE creates to use as a base platform for the Xilinx software design environment. This chapter will illustrate all these steps, the files involved, as well as the software utilities used to progress the SoC software development, profiling, and debugging phases.

Xilinx’s embedded software development environment is called Vitis. It is the second IDE that centralizes...