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Architecting and Building High-Speed SoCs

You're reading from  Architecting and Building High-Speed SoCs

Product type Book
Published in Dec 2022
Publisher Packt
ISBN-13 9781801810999
Pages 426 pages
Edition 1st Edition
Languages
Author (1):
Mounir Maaref Mounir Maaref
Profile icon Mounir Maaref

Table of Contents (20) Chapters

Preface Part 1: Fundamentals and the Main Features of High-Speed SoC and FPGA Designs
Chapter 1: Introducing FPGA Devices and SoCs Chapter 2: FPGA Devices and SoC Design Tools Chapter 3: Basic and Advanced On-Chip Busses and Interconnects Chapter 4: Connecting High-Speed Devices Using Buses and Interconnects Chapter 5: Basic and Advanced SoC Interfaces Part 2: Implementing High-Speed SoC Designs in an FPGA
Chapter 6: What Goes Where in a High-Speed SoC Design Chapter 7: FPGA SoC Hardware Design and Verification Flow Chapter 8: FPGA SoC Software Design Flow Chapter 9: SoC Design Hardware and Software Integration Part 3: Implementation and Integration of Advanced High-Speed FPGA SoCs
Chapter 10: Building a Complex SoC Hardware Targeting an FPGA Chapter 11: Addressing the Security Aspects of an FPGA-Based SoC Chapter 12: Building a Complex Software with an Embedded Operating System Flow Chapter 13: Video, Image, and DSP Processing Principles in an FPGA and SoCs Chapter 14: Communication and Control Systems Implementation in FPGAs and SoCs Index Other Books You May Enjoy

Using the emulation platform for debugging the SoC test software

QEMU can be used as a virtual target to debug the software we built in Chapter 8, FPGA SoC Software Design Flow, for the ETS SoC project. Readers with experience of using Eclipse-based SDK debugging of embedded software running on a hardware target board will find it similar to using QEMU as a target debug environment in the Vitis IDE. To connect QEMU as a debug target, let’s go through the next steps:

  1. We need to configure or examine the Debug Configuration… option to use. Right-click on the Debug build under ETS_SoC_CA9 and click Debug | Debug Configuration….

Figure 9.14 – Accessing the Debug Configuration... menu in the Vitis IDE

  1. This will open the following window. Select Debugger_ETS_SoC_CA9-Emulation, tick the Emulation entry, and make sure that all the settings match the following screenshot:

Figure 9.15 –...

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