You're reading from Architecting and Building High-Speed SoCs

Product typeBook

Published inDec 2022

PublisherPackt

ISBN-139781801810999

Edition1st Edition

Concepts

Embedded Systems

Author (1)

Mounir Maaref

Part 2: Implementing High-Speed SoC Designs in an FPGA

This part introduces the design flow and the tools used, from the architectural concept to the implementation of an SoC design in an FPGA for both the hardware and the accompanying software.

This part comprises the following chapters:

Chapter 6, What Goes Where in a High-Speed SoC Design
Chapter 7, FPGA SoC Hardware Design and Verification Flow
Chapter 8, FPGA SoC Software Design Flow
Chapter 9, SoC Design Hardware and Software Integration

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Architecting and Building High-Speed SoCs

Published in: Dec 2022Publisher: PacktISBN-13: 9781801810999

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Author (1)

Mounir Maaref

Mounir Maaref lives in the UK and works as a Principal SoC Architect. He has 25 years of experience in the microelectronics industry spanning FPGAs, ASICs, embedded processing, networking, data storage, satellite communications, Bluetooth, and WiFi connectivity. He likes working on cutting edge technologies involving both hardware and soft ware. His main focus is on the system architecture design, hardware and software interactions, performance analysis, and modeling. He has published several application notes and white papers and has been a speaker at many conferences worldwide. He holds a masters degree in Electronics and Telecoms. He is a 2nd dan black belt in Tang Soo Do and is getting trained to become a martial arts instructor.
Read more about Mounir Maaref

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