You're reading from Architecting and Building High-Speed SoCs

Product type Book

Published in Dec 2022

Publisher Packt

ISBN-13 9781801810999

Pages 426 pages

Edition 1st Edition

Languages

Concepts

Embedded Systems

Author (1):

Mounir Maaref

Table of Contents (20) Chapters

Preface

Part 1: Fundamentals and the Main Features of High-Speed SoC and FPGA Designs

Chapter 1: Introducing FPGA Devices and SoCs

Chapter 2: FPGA Devices and SoC Design Tools

Chapter 3: Basic and Advanced On-Chip Busses and Interconnects

Chapter 4: Connecting High-Speed Devices Using Buses and Interconnects

Chapter 5: Basic and Advanced SoC Interfaces

Part 2: Implementing High-Speed SoC Designs in an FPGA

Chapter 6: What Goes Where in a High-Speed SoC Design

Chapter 7: FPGA SoC Hardware Design and Verification Flow

Chapter 8: FPGA SoC Software Design Flow

Chapter 9: SoC Design Hardware and Software Integration

Part 3: Implementation and Integration of Advanced High-Speed FPGA SoCs

Chapter 10: Building a Complex SoC Hardware Targeting an FPGA

Chapter 11: Addressing the Security Aspects of an FPGA-Based SoC

Chapter 12: Building a Complex Software with an Embedded Operating System Flow

Chapter 13: Video, Image, and DSP Processing Principles in an FPGA and SoCs

Chapter 14: Communication and Control Systems Implementation in FPGAs and SoCs

Index

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Major steps of the SoC software design flow

As previously introduced in Chapter 2, FPGA Devices and SoC Design Tools, the software development for the Xilinx FPGA SoC is performed using the Vitis tools. A project for the ETS SoC is first created in the Vitis IDE using its XSA archive file – this file needs to be generated by the Vivado IDE for the ETS SoC hardware.

The full flow of the software design process in the Vitis IDE is summarized by the following diagram:

Figure 8.1 – The Vitis embedded software development steps for the ETS SoC design