FPGA Resources and How to Use Them

In the previous chapter, we discussed state machines. We looked at how we can use state machines to design a simple calculator and looked at some more complex operations, such as division. This allowed us to see a practical example of complex state machine design. We briefly discussed packaging for reuse and demonstrated this with a simple traffic light controller.

In this chapter, we are going to look at some of the underlying FPGA resources in more detail. You’ve been briefly introduced to some of these, such as Random Access Memory (RAM) and Digital Signal Processing (DSP) blocks, while others have been glossed over, such as Phase Locked Loops (PLLs), where we used one to fix a timing problem in our calculator design. We’ll build upon our previous experience by incorporating these new resources.

By the completion of this chapter, you’ll have a good idea of how to interface with external components. We’ve previously...

Technical requirements

The technical requirements for this chapter are the same as those for Chapter 2, FPGA Programming Languages and Tools.

To follow along with the examples and the project, you can find the code files for this chapter at the following repository on GitHub: https://github.com/PacktPublishing/The-FPGA-Programming-Handbook-Second-Edition/tree/master/CH6.

What is a digital microphone?

A digital microphone needs to receive analog audio data and convert it to digital data, which is usable for digital electronics. Let’s look at how we can accomplish this using Pulse-Density Modulation (PDM).

What is PDM?

A PDM signal is captured by a 1-bit analog-to-digital converter (ADC) that receives an analog waveform and encodes its output as a string of digital pulses, as shown in Figure 6.1. When the pulses are denser over a period of time, they represent larger values. In Figure 6.1, we see a signal from the testbench as a sine wave. The following signal shows an example of what a PDM form of that waveform might look like:

Figure 6.1: PDM waveform example

The advantage of this type of signal is that we only need a single wire to transmit the information since audio is limited to about 24 kHz and our clock rate will be orders of magnitude above this.

With the basics of digital microphones and PDM, let’s now...

Project 6 – Listening and learning

The Nexys A7 board has a digital microphone on board that we can use to capture ambient noise, speech, and such from the environment the board is in. We’ll be utilizing this microphone to capture sound. In order to do that, we’ll need to explore the format of the data and how to sample it.

It’s also possible to play it back.

Let’s take a look at interfacing with the microphone. The project is located at CH6/SystemVerilog/build/pdm_audio/pdm_audio.xpr or CH6/VHDL/build/pdm_audio/pdm_audio.xpr.

You can find the following code in the CH6/SystemVerilog/hdl/pdm_top.sv folder:

module pdm_top
  #(
    parameter RAM_SIZE     = 16384,
    parameter CLK_FREQ = 100,
    parameter SAMPLE_COUNT = 128
   )
  (
   input wire   clk, // 100Mhz clock
   // Microphone interface
   output logic m_clk,
   output logic m_lr_sel,
   input wire   m_data,
   // Tricolor LED
   output logic R,
   output logic G,
   output...

Project 7 – Using the temperature sensor

The Nexys A7 board has an Analog Device ADT7420 temperature sensor. This chip uses an industry-standard I2C interface to communicate. This two-wire interface is used primarily for slower-speed devices. It has the advantage of allowing multiple chips to be connected through the same interface and be addressed individually. In our case, we will be using it to simply read the current temperature from the device and display the value on the seven-segment display.

Our first step will be to design an I2C interface. In Chapter 8, Introduction to AXI, we’ll be looking at designing a general-purpose I2C interface, but for now, we’ll use the fact that the ADT7420 comes up in a mode where we can get temperature data by reading two I2C memory locations. First, let’s look at the timing diagram for the I2C bus and the read cycle we’ll be using:

Figure 6.13: I2C timing

We can see from the timing diagram...

Summary

In this chapter, we’ve explored how to do some simple communication with the outside world. We’ve gathered microphone data, stored it, and played it back. With our interface to the ADT7420, we’ve also explored the I2C bus, a common way of communicating with slower devices. We captured temperature data and showed how we could display a fixed-point number on the seven-segment display. We introduced FIFOs and discussed how we can filter the data to remove the noisiness of the temperature data varying.

I2C interfaces are used to communicate with many low-speed devices such as A/Ds and D/As and are very important for a lot of FPGA designs. You should feel comfortable that you can do it at this point, and we will explore how to make a more generic version of the interface in a later chapter. If you are interested in audio data, you should have some confidence in capturing, manipulating, and generating audio.

In the next chapter, we are going to look...

Questions

1. What are the advantages of an I2C bus?
   1. We can move large amounts of data quickly.
   2. We only need two wires to communicate.
   3. Multiple devices can be connected using only two wires.
   4. All of the above.
   5. Only (b) and (c).
2. What would be the preferred order of preference when you require a type of memory?
   1. Use the IP catalog, infer, and then use xpm_memory.
   2. Use xpm_memory, use the IP catalog, and then infer.
   3. Infer, use xpm_memory, and then use the IP catalog.
   4. Use the IP catalog, use xpm_memory, and then infer.
3. The following code infers a:

   assign data = (data_en) ? 'z : '0; // SystemVerilog
   data <= 'Z' when data_en else '0'; -- VHDL
   

   1. multiplier.
   2. register.
   3. tristate IO.
4. Gray coding is used in FIFOs.
   1. Always.
   2. To pass counter information...

Answers

1. e. Only (b) and (c).
2. c. Infer, use xpm_memory, and then use the IP catalog.
3. c. tristate IO.
4. b. To pass counter information across clock domains in an asynchronous FIFO.
5. a. Simple dual port

Further reading

Please refer to the following links for more information regarding what was covered in this chapter:

• https://reference.digilentinc.com/reference/programmable-logic/nexys-a7/reference-manual
• Temperature sensor specification: https://www.analog.com/media/en/technical-documentation/data-sheets/adt7420.pdf
• Deeper dive into FIFOs: http://www.sunburst-design.com/papers/CummingsSNUG2002SJ_FIFO2.pdf
• https://www.xilinx.com/support/documentation/user_guides/ug473_7Series_Memory_Resources.pdf

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