Although systems that include both an FPGA and SoC have been very common for years, a more recent addition has been hybrid FPGA/SoC chips, which include the dies for both an FPGA and an SoC (usually ARM based) in the same package. These are then linked together with a bus so that both can efficiently communicate with each other using memory-mapped I/O and similar.
Common examples of such FPGAs currently include Altera (now Intel), Cyclone V SoC, and Xilinx Zynq. The Cyclone V SoC's block diagram from the official datasheet gives a good overview of how such a system works:
Here, we can see that there are a number of ways that the Hard Processor System (HPS) and FPGA sides can communicate with each other, such as via a shared SDRAM controller, two point-to-point links, and a number of other interfaces. For the Cyclone V SoC, either the FPGA or SoC side can be the first side that boots when the system starts, allowing for a wide range of system configuration options.
