Chapter 8: Lots of Data? MIG and DDR2

We've been working our way up toward a more functional design that can gather information, do some useful work, and present it in a meaningful manner. In previous chapters, we captured audio data and temperature data. We also looked at wrapping some of the interfaces so that we could use the IP integrator . The IP integrator also allowed for easily instancing floating-point operations. This has given us some functional designs, but we've been limited to using LEDs and then seven-segment displays, making it difficult to visualize information such as the PDM waveform data or even the temperature.

We have another option when it comes to displaying using our boards: the VGA connector. To effectively use it, we will need access to quite a bit of memory. To display 640x480 8-bit color, we would need 300 kilobytes, almost 1 megabyte for true color. We can certainly play some games to stretch out our memory, but alternatively, we can use the...

Technical requirements

The technical requirements for this chapter are the same as those for Chapter 1, Introduction to FPGA Architectures and Xilinx Vivado.

To follow along with the examples and the project, you can find the code files for this chapter at the following repository on GitHub: https://github.com/PacktPublishing/Learn-FPGA-Programming/tree/master/CH8.

Project 10 – introducing external memory

Up until now, we've been using internal Block RAM (BRAM) or distributed RAM. These types of memory are very fast. BRAMs can be accessed in a single clock cycle up to the maximum frequency (fmax) of the device given certain constraints. Look up table memories (LUTRAMs) are a little more flexible in that they can be used asynchronously. Both types of memory are very convenient for small storage, lookup tables, fast memory for things such as cache, and if you have enough for a design, keeping costs and complexity down.

There are many external memory types available for use in designs. Looking just at synchronous Dynamic RAMs (DRAMs) that are still available, we can see how the performance has changed with each generation:

Figure 8.1 – External DRAM performance

Looking at the preceding chart, the first question would be what is the performance of the internal BRAM versus the external memory? What are...

Other external memory types

There are a variety of memory types that have been introduced over the years that are or have become more common with FPGAs. I want to briefly touch on them as you might be interested in them for your own projects in the future.

Quad Data Rate (QDR) SRAM

Quad Data Rate (QDR) SRAM is commonly used in networking applications. Like DDR memory, data is transferred on both edges of the clock for performance. Unlike DDR, QDR has both read and write channels, so you can issue read and write commands simultaneously. Also, unlike DDR DRAM, this is an SRAM, so there are no refresh cycles and the latency for a read or write can be as low as about 13 clock cycles at 300 MHz.

QDR has a much larger capability than FPGA internal memory, but much less than DDR. It's also relatively expensive, which is why it's mostly used in networking applications.

HyperRAM

HyperRAM is a type of self-refreshing DRAM designed for Low Pin Count (LPC) applications...

Summary

In this chapter, we've looked at external memory, in particular, DDR2, as that is what we have readily available on the Nexys A7. We've looked at generating a core using the Xilinx MIG controller and how to generate the example design. We've then run the example design on the board and, using the ILA, seen it in operation. We've also taken a quick look at other external memory types.

Up until now, we've limited ourselves to LEDs and seven-segment displays for our output. In the next chapter, we are going to take the DDR controller and create a VGA controller. Dust off your CRT or LCD with a VGA connector and we'll work on displaying our temperature sensor data, our audio data, and calculator data using a real display.

Questions

1. Which of the following are true about internal versus external memory?

   a) DDR memory storage capacity is much smaller than BRAM.

   b) For the same memory data width, DDR has much higher performance than BRAM.

   c) The latency to access data from BRAM and DDR is identical.

   d) You should always use LUTRAM first before using any other memory type.

2. To generate DDR2 memory for our project, we used the Xilinx:

   a) Massive IP Goliath (MIG)

   b) Minimally Informative Google (MIG)

   c) Memory Interface Generator (MIG)

3. We can use ILAs to examine data in the FPGA and VIOs to read and write data.

   a) True

   b) False

4. Artix 7 FPGAs can use which of the following memories from the MIG?

   a) DDR2

   b) DDR3

   c) DDR4

   d) LPDDR2

   e) QDR

5. It is possible to use HyperRAM, SPI RAM, and SDRAM if you are willing to write your own controllers.

   a) True

   b) False

Challenge

We've created the DDR2 using the MIG and we have the example design. We don't have a way of inserting errors. Can you utilize...

Further reading

For more information about what was covered in this chapter, please refer to the following:

• https://www.micron.com/products/dram/ddr2-sdram/part-catalog/mt47h64m16hr-25
• https://reference.digilentinc.com/reference/programmable-logic/nexys-a7/reference-manual