Using macros

make provides a macro facility. This is similar to C’s preprocessor directives. Unlike preprocessor macros, make has a number of predefined macros. We’ll encounter just a few of them here. If you want to see the full list (and “full” is an understatement), use the following command:

make –p

You’ll get a bewildering list of macros. They are there for very advanced and wide-ranging uses of make.

Using macros involves two steps:

1. Define the macro name and assign it a value.
2. Use the macro in a rule by wrapping it in $(…).

The two predefined macros we’ll use are CC for which compiler to call and CCFLAGS for compiler options. With this in mind, modify your makefile to define and use these macros as follows:

CC      = clang
CCFLAGS = -Wall -Werror -std=c17
dealer: card.c hand.c deck.c dealer.c
  $(CC) card.c hand.c deck.c dealer.c -o dealer $(CCFLAGS)

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