SPI is, in its most typical form, a 4-wire protocol. Like I2C, it is a single-master, multiple-slave protocol. It has a clock line (SCK), a data line from the master to the slaves (MOSI), a data line from the slaves to the master (MISO), and a separate chip select (CS) line for each slave device. The CS signal for a particular slave device is pulled low by the master before communicating with it, and any other device on the same bus with its CS line set high will ignore any transferred data. SPI requires more pins than I2C, but unlike I2C it doesn't require transactions to include a slave address header, and it has separate data lines for each direction of communication (which can transfer data simultaneously). For these reasons, it can typically achieve higher data rates than I2C. The number of devices that can be put on the same SPI bus is dictated by the number of available pins for CS signals.
The SPI protocol is less strictly defined than I2C, with the bit order, clock mode, and...
