A general makefile for simple projects
We have seen the various ways we can use make to build our simple projects. With what we currently know, we can create a general makefile for simple projects. A makefile for these simple projects has some limitations, as follows:
- All source files and header files are in the same directory.
- Header dependency is simple; all source files depend upon all headers. This is not ideal, but the purpose of this makefile is simple. To keep that simplicity, some efficiency is sacrificed.
- A single target is generated.
With those limitations in mind, you can now modify your makefile as follows:
CCÂ Â Â Â Â Â = clang CCFLAGS = -Wall -Werror -std=c17 LDLIBSÂ Â = SRCS = $(wildcard *.c) HDRS = $(wildcard *.h) OBJS = $(patsubst %.c, %.o , $(SRCS)) PROG = dealer $(PROG): $(OBJS) Â Â @echo [Sources: $(SRCS)] Â Â @echo [Headers: $(HDRS)] Â Â @echo [Objects: $(OBJS)] Â Â @echo...