Describing targets using TableGen
The target architecture can be described in terms of the registers present, the instruction set, and so on. Describing each of them manually is a tedious task. TableGen is a tool for backend developers that describes their target machine with a declarative language—*.td. The *.td files will be converted to enums, DAG-pattern matching functions, instruction encoding/decoding functions, and so on, which can then be used in other C++ files for coding.
To define registers and the register set in the target description's .td files, tablegen will convert the intended .td file into .inc files, which will be #include syntax in our .cpp files referring to the registers.
Getting ready
Let's assume that the sample target machine has four registers, r0-r3; a stack register, sp; and a link register, lr. These can be specified in the SAMPLERegisterInfo.td file. TableGen provides the Register class, which can be extended to specify registers.
How to do it
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